74HC74 Dual D-Type Positive-Edge-Triggered Flip-Flops

KShs100

74HC74 Dual D-Type Positive contain two independent D1 type positive-edge-triggered flip-flops. A low level at  the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs.

Description

74HC74 Dual D-Type Positive contain two independent D1 type positive-edge-triggered flip-flops. A low level at  the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data pd = 15 ns at the data (D) input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK.

Features of 74HC74 Dual D-Type Positive-Edge-Triggered Flip-Flops includes;

  • Wide Operating Voltage Range: 2 V to 6 V
  • Outputs Can Drive Up To 10 LSTTL Loads
  • Low Power Consumption, 40-µA Maximum ICC
  • Very Low Input Current of 1 µA
  • ±4-mA Output Drive at 5 V

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